H8SSLASH2224 datasheet(1065/1071 Pages) RENESAS

1065 / 1071 page

Index

Rev. 5.00 Aug 08, 2006 page 979 of 982

REJ09B0054-0500

Index

16-Bit Timer Pulse Unit.......................... 359

A/D Conversion Time............................. 699

A/D Converter ........................................ 689

A/D Converter Activation....................... 426

Absolute Address...................................... 91

ABWCR...................................812, 823, 834

Activation by Software ........................... 302

ADCR ..............................695, 816, 828, 838

ADCSR............................693, 816, 828, 838

ADDR..............................692, 816, 828, 838

Address Space........................................... 70

Addressing Modes .................................... 90

ADI ......................................................... 701

Advanced Mode........................................ 67

Analog Input Channel............................. 692

Arithmetic Operations Instructions........... 82

ASTCR ....................................812, 823, 834

Asynchronous Mode............................... 585

BARA ..............................158, 810, 820, 832

BARB ..............................159, 810, 820, 832

Bcc............................................................ 87

BCRA ..............................159, 810, 820, 832

BCRB...............................160, 810, 820, 832

BCRH ......................................812, 823, 834

BCRL.......................................812, 823, 834

Bit Manipulation Instructions ................... 85

bit rate..................................................... 571

Bit Rate ................................................... 571

Block Data Transfer Instructions .............. 89

block transfer mode ................................ 296

Branch Instructions................................... 87

Break....................................................... 625

break address .................................. 157, 160

break conditions...................................... 160

BRR .................................571, 815, 827, 837

Buffer Operation..................................... 405

Cascaded Operation ................................ 409

Chain Transfer ........................................ 298

CMIA...................................................... 458

CMIB ...................................................... 458

Condition Field ......................................... 89

Condition-Code Register .......................... 74

CPU........................................................... 63

CRA ................................ 286, 808, 818, 830

CRB ................................ 286, 808, 818, 830

D/A Converter......................................... 707

DACR ............................. 709, 809, 819, 831

DADR ............................. 708, 809, 819, 831

DAR................................ 285, 808, 818, 830

Data Transfer Controller ......................... 281

Data Transfer Instructions......................... 81

DDCSWR ....................... 653, 809, 819, 831

DEND0A ................................................ 275

DEND0B................................................. 275

DEND1A ................................................ 275

DEND1B................................................. 275

DMABCR ............................... 814, 826, 836

DMACR.................................. 814, 826, 836

DMATCR ............................... 814, 826, 836

DMAWER .............................. 814, 826, 836

DTC Vector Table .................................. 290

DTCER ........................... 286, 810, 820, 832

DTVECR ........................ 288, 810, 820, 832

EBR1....................................... 817, 828, 838

EBR2....................................... 817, 828, 838

Effective Address...................................... 94

Effective Address Extension..................... 89

ERI.......................................................... 623

ETCR ...................................... 813, 823, 834

Exception Handling ................................ 119

Exception Handling Vector Table........... 120

Extended Control Register ........................ 73

External Trigger Input Timing................ 701

FLMCR1................................. 816, 828, 838

FLMCR2................................. 817, 828, 838

FLPWCR ................................ 817, 828, 838

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