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FS23 Scheda tecnica(PDF) 157 Page - NXP Semiconductors |
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FS23 Scheda tecnica(HTML) 157 Page - NXP Semiconductors |
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157 / 230 page ![]() NXP Semiconductors FS23 Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers 22.38 M_LDT_CFG3 Bit 15 14 13 12 11 10 9 8 Write - - - - - - - - Read 0 0 0 0 0 0 0 0 Reset 0 0 0 0 0 0 0 0 Bit 7 6 5 4 3 2 1 0 Write LDT_WUP_H Read LDT_WUP_H Reset 0 0 0 0 0 0 0 0 Table 149. M_LDT_CFG3 register bit allocation Bit Symbol Description Configure and read the eight more significant bits of LDT wake-up LDT value in LP mode (MSB) 0 to 7 LDT_WUP_H POR, LDT count started Table 150. M_LDT_CFG3 register bit description 22.39 M_LDT_CTRL Bit 15 14 13 12 11 10 9 8 Write - - - - - - - - Read 0 0 0 0 0 0 0 0 Reset 0 0 0 0 0 0 0 0 Bit 7 6 5 4 3 2 1 0 Write LDT2LP LDT_FNCT LDT_SEL LDT_MODE LDT_EN - Read LDT2LP LDT_FNCT LDT_SEL LDT_MODE LDT_EN LDT_RUN Reset 0 0 0 0 0 0 0 0 Table 151. M_LDT_CTRL register bit allocation Bit Symbol Description LDT status 0 LDT is idle 1 LDT is busy 0 LDT_RUN POR, LDT stopped Start LDT operation 0 LDT is disabled 1 LDT starts counting 1 LDT_EN POR Set LDT operation mode 0 LDT is set to long count (1 s) 1 LDT is set to short count (128 us) 2 LDT_MODE POR Table 152. M_LDT_CTRL register bit description FS23 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 7.0 — 16 October 2024 Document feedback 157 / 230 |
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