FS23 datasheet(192/230 Pages) NXP

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NXP Semiconductors

FS23

Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers

24.11 OTP_V1_CFG9

Bit

Write

Read

VBOS2V1_

SW_ALWAYS_

EN_OTP

V1MON_ OTP

CONF_OV_

V1_OTP

CONF_TSD_

V1_OTP

CONF_OC_

V1_OTP

VV1_

LDO_ OTP

CONF_OC_

TO_V1_OTP

VBOS2V1_

SW_LP_

EN_OTP

Reset

Table 213. OTP_V1_CFG9 register bit allocation

Bit

Symbol

Description

Control VBOS to V1 switch in LPON mode when V1 = BUCK

(the switch is kept open when V1 = LDO)

0 VBOS to V1 switch is open in LPON mode

1 VBOS to V1 switch is closed in LPON mode

VBOS2V1_SW_LP_EN_OTP

Reset on power-on reset

Select V1 LDO overcurrent time out to protect the external PNP

0 V1 PNP OC time out = 10 ms

1 V1 PNP OC time out = 1 ms

CONF_OC_TO_V1_OTP

Reset on power-on reset

Select V1 LDO regulator output voltage

0 V1 = 3.3 V

1 V1 = 5.0 V

VV1_LDO_OTP

Reset on power-on reset

Select V1 LDO overcurrent threshold

0 V1 LDO OC = 150 mA

1 V1 LDO OC = 75 mA

CONF_OC_V1_OTP

Reset on power-on reset

Select the device reaction in case of V1 thermal shutdown detection

0 V1 regulator is disabled in case of TSD

1 V1 regulator is disabled and the device transitions to Fail-Safe state in case of TSD

CONF_TSD_V1_OTP

Reset on power-on reset

Select the device reaction in case of V1 overvoltage detection

0 V1 regulator is disabled in case of OV

1 V1 regulator is disabled and the device transitions to Fail-Safe state in case of OV

CONF_OV_V1_OTP

Reset on power-on reset

Select V1 VMON input voltage

0 V1MON = 3.3 V

1 V1MON = 5.0 V

V1MON_OTP

Reset on power-on reset

Control VBOS to V1 switch in Normal and LPON modes when V1 = BUCK

(the switch is kept open when V1 = LDO)

0 VBOS to V1 switch is open in Normal mode

1 VBOS to V1 switch is closed in Normal and LPON mode (possible only when V1 = 5 V in Normal mode)

VBOS2V1_SW_

ALWAYS_EN_OTP

Reset on power-on reset

Table 214. OTP_V1_CFG9 register bit description

FS23

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Product data sheet

Rev. 7.0 — 16 October 2024

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