FS23 datasheet(196/230 Pages) NXP

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NXP Semiconductors

FS23

Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers

24.15 OTP_HVIO_CFG2

Bit

Write

Read

HVIO1_OUT_

EN_OTP

HVIO1_OUT_

DFLT_OTP

HVIO1PUPD_OTP

HVIO2_OUT_

EN_OTP

HVIO2_OUT_

DFLT_OTP

HVIO2PUPD_OTP

Reset

Table 221. OTP_HVIO_CFG2 register bit allocation

Bit

Symbol

Description

Select the pull down on HVIO2 pin

00 HVIO2 internal pull down and pull up are configured as cell repeater

01 HVIO2 internal pull down is enabled and pull up is disabled

10 HVIO2 internal pull down is disabled and pull up is enabled

11 HVIO2 internal pull down and pull up are disabled

0 to 1

HVIO2PUPD_OTP

Reset on power-on reset

Configure the HVIO2 pin default state when HVIO2 is an output

0 HVIO2 default state is low (asserted)

1 HVIO2 default state is high (HIZ)

HVIO2_OUT_DFLT_OTP

Reset on power-on reset

Configure the HVIO2 pin as an output

0 HVIO2 is configured as an input

1 HVIO2 is configured as an output

HVIO2_OUT_EN_OTP

Reset on power-on reset

Select the pull down on HVIO1 pin

00 HVIO1 internal pull down and pull up are configured as cell repeater

01 HVIO1 internal pull down is enabled and pull up is disabled

10 HVIO1 internal pull down is disabled and pull up is enabled

11 HVIO1 internal pull down and pull up are disabled

4 to 5

HVIO1PUPD_OTP

Reset on power-on reset

Configure the HVIO1 pin default state when HVIO1 is an output

0 HVIO1 default state is low (asserted)

1 HVIO1 default state is high (HIZ)

HVIO1_OUT_DFLT_OTP

Reset on power-on reset

Configure the HVIO1 pin as an output

0 HVIO1 is configured as an input

1 HVIO1 is configured as an output

HVIO1_OUT_EN_OTP

Reset on power-on reset

Table 222. OTP_HVIO_CFG2 register bit description

FS23

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Product data sheet

Rev. 7.0 — 16 October 2024

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