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FS23 Scheda tecnica(PDF) 209 Page - NXP Semiconductors |
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FS23 Scheda tecnica(HTML) 209 Page - NXP Semiconductors |
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209 / 230 page ![]() NXP Semiconductors FS23 Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers 25 Application information aaa-051472 Foot print for ferrite PMEG4020ER-Q Foot print for ferrite VBAT Wake1 global wake-up source 7.95 V for OTP programming 22 μF 10 μF 100 nF 10 μF 1 μH V1_IN PMEG4020ETR VBAT VSHS HS1 HVIO1 FS2320 HVBUCK 450 kHz SPI 5.1 kΩ (0805) 10 kΩ (0805) 1 μF 100 kΩ 10 μF VBOS For DEBUG mode only 1 μF VDIG DBG 10 μF DNP 1 nF VSUP 1 μF 1 μF V2_IN V3_IN DNP 1 nF 1-10 nF 10 nF Door switch 10 nF 22 nF 10 kΩ WAKE1 Wake2 local wake-up source WAKE2 HS2 HVIO2 10 kΩ (0805) Rlim DNP 1 nF 1-10 nF 10 nF Door switch 10 kΩ HS3 47 pF HS4 47 pF 10-33 nF LEDs 10-33 nF LIN CANH CANL PGND, GND_EP, GND_IO, GNDCAN, GNDLIN 220 pF Rlim LEDs 60 kΩ 60 kΩ DNP (optional) (optional) GNDCAN DNP 4.7 nF DNP 4 x 10 µF VLS3015CX-220M-H 22 µH PMEG4005EJ-Q 100 nF 33 nF VDDIO V1 V1_SW BOOT V2_FB V2 V1 DNP 100 nF DNP 100 nF DNP 100 nF V2 2.2 μF SCLK MOSI CSB MISO CANTXD CANRXD LINTXD FCCU1 LINRXD V3 V3 2.2 μF 1 nF AMUX To MCU ADC 200 Ω 1 nF INTB RSTB VDDIO 5.1 kΩ 1 nF FS0B VDDIO 5.1 kΩ 5.1 kΩ 22 nF To fail-safe circuitry 10 nF LIMP0 VSUP 5.1 kΩ 10 kΩ 22 nF To fail-safe circuitry 10 nF VMONEXT Ext VREG (3.3 V) 22.1 kΩ 9.31 kΩ LVIO3 LVIO4 Figure 56. Example of application schematic with 450 kHz HVBUCK version, SPI interface FS23 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 7.0 — 16 October 2024 Document feedback 209 / 230 |
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