FS23 datasheet(219/230 Pages) NXP

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NXP Semiconductors

FS23

Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers

ISO 11898-2:2016

NXP data sheet

Received recessive bit width @ 2 Mbit/s

tBit(RXD)

TCAN_BIT_RX_2M

CAN received recessive bit

width @ 2 Mbps

Receiver timing symmetry @ 2 Mbit/s

ΔtRec

ΔTCAN_BIT_RXBUS_2M

CAN receiver timing

symmetry @ 2 Mbps

Optional HS-PMA implementation data signal timing requirements for use with bit rates above 2 Mbit/s up to 5 Mbit/s

Transmitted recessive bit width @ 5 Mbit/s, intended

tBit(Bus)

TCAN_BIT_BUS_5M

CAN transmitted recessive bit

width @ 5 Mbps

Received recessive bit width @ 5 Mbit/s

tBit(RXD)

TCAN_BIT_RX_5M

CAN received recessive bit

width @ 5 Mbps

Receiver timing symmetry @ 5 Mbit/s

ΔtRec

ΔTCAN_BIT_RXBUS_5M

CAN receiver timing

symmetry @ 5 Mbps

HS-PMA maximum ratings of VCAN_H, VCAN_L and VDiff

Maximum rating VDiff

VDiff

VCAN_DIFF_MAX

CAN maximum rating for

VDIFF

General maximum rating VCAN_H and VCAN_L

VCAN_H, VCAN_L

CANH, CANL

Global CAN bus pins voltage

rating

HS-PMA maximum leakage currents on CAN_H and CAN_L, unpowered

Leakage current on CAN_H, CAN_L

ICAN_H, ICAN_L

IQCANH, IQCANL

CAN input leakage current

Table 247. ISO 11898-2:2016 to NXP data sheet parameter conversion...continued

FS23

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 7.0 — 16 October 2024

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