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CDCE72010 Scheda tecnica(PDF) 20 Page - Texas Instruments

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Il numero della parte CDCE72010
Spiegazioni elettronici  Ten Output High Performance Clock Synchronizer, Jitter Cleaner, and Clock Distributor
PDF  70 Pages
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Produttore elettronici  TI [Texas Instruments]
Homepage  http://www.ti.com
Logo TI - Texas Instruments

CDCE72010 Scheda tecnica(HTML) 20 Page - Texas Instruments

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CDCE72010 Default Configuration
CDCE72010
SCAS858 – JUNE 2008...................................................................................................................................................................................................... www.ti.com
The CDCE72010 on-board EEPROM has been factory preset to the default settings listed in Table 5
Table 5. CDCE72010 Default Configuration Settings
REGISTER
DEFAULT SETTING
REGISTER
DEFAULT SETTING
REG0000
002C0040
REG0007
EB040717
REG0001
83840051
REG0008
010C0158
REG0002
83400002
REG0009
01000049
REG0003
83400003
REG0010
0BFC07CA
REG0004
81800004
REG0011
C000058B
REG0005
81800005
REG0012
61E09B0C
REG0006
EB040006
The default configuration programmed in the EEPROM is: a 10MHz primary reference single-ended, a
491.52MHz LVPECL VCXO running at 80kHz, and PFD with a 10Hz external loop filter. Reference Auto Select is
off, M divider is set for 125, N divider is set to 768, charge pump current is set to 2.2mA, and feedback divider is
set to divide by 8. Divider 1 is set to divide by 4, Dividers 2 and 3 are set to divide by 1, Dividers 4 and 5 are set
to divide by 2, Dividers 6 and 7 are set to divide by 8, and Divider 8 is set to divide by 16.Output0:LVCMOS,
Output1:Hi-LVPECL,
Output2:
Hi-LVPECL,
Output3:Hi_LVPECL,
Output4:LVPECL,
Output5:LVPECL,
Output6:Hi-LVDS, Output7:Hi-LVDS, Output8:LVCMOS and Output9:LVCMOS.
20
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Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): CDCE72010



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