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CDCE72010 Scheda tecnica(PDF) 22 Page - Texas Instruments

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Il numero della parte CDCE72010
Spiegazioni elettronici  Ten Output High Performance Clock Synchronizer, Jitter Cleaner, and Clock Distributor
PDF  70 Pages
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Produttore elettronici  TI [Texas Instruments]
Homepage  http://www.ti.com
Logo TI - Texas Instruments

CDCE72010 Scheda tecnica(HTML) 22 Page - Texas Instruments

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CDCE72010
SCAS858 – JUNE 2008...................................................................................................................................................................................................... www.ti.com
Register 1: SPI Mode
SPI
RAM
POWER UP
BIT NAME
RELATED BLOCK
DESCRIPTION/FUNCTION
BIT
BIT
CONDITION
0
A0
Address 0
1
1
A1
Address 1
0
2
A2
Address 2
0
3
A3
Address 3
0
4
0
ACDCSEL
Input Buffers
If set to 0 AC Termination, If set to 1 DC termination
EEPROM
5
1
HYSTEN
Input Buffers
If set to 1 Input Buffers Hysteresis enabled
EEPROM
6
2
TERMSEL
Input Buffers
If set to 0 Input Buffer Internal Termination enabled
EEPROM
7
3
PRIINVBB
Input Buffers
If set to 1 Primary Input Negative pin biased with internal VBB voltage
EEPROM
8
4
SECINVBB
Input Buffers
If set to 1 Secondary Input Negative pin biased with internal VBB voltage
EEPROM
9
5
FAILSAFE
Input Buffers
If set to 1 Fail Safe is enabled for all input buffers
EEPROM
10
6
PH1ADJC0
11
7
PH1ADJC1
12
8
PH1ADJC2
13
9
PH1ADJC3
Output 0 and 1
Coarse phase adjust select for Output Divider 1
EEPROM
14
10
PH1ADJC4
15
11
PH1ADJC5
16
12
PH1ADJC6
17
13
OUT1DIVRSEL0
18
14
OUT1DIVRSEL1
19
15
OUT1DIVRSEL2
Output Divider 1 ratio select
20
16
OUT1DIVRSEL3
Output 0 and 1
EEPROM
(seeTable 7)
21
17
OUT1DIVRSEL4
22
18
OUT1DIVRSEL5
23
19
OUT1DIVRSEL6
When set to 0, the divider is disabled
24
20
EN01DIV
Output 0 and 1
EEPROM
When set to 1, the divider is enabled
25
21
PECL1HISWING
Output 1
High Output Voltage Swing in LVPECL Mode if set to 1
EEPROM
26
22
CMOSMODE1PX
LVCMOS mode select for OUTPUT 1 Positive Pin.
Output 1
EEPROM
(X,Y) = 00: Active, 10: Inverting, 11: Low, 01: 3-State
27
23
CMOSMODE1PY
28
24
CMOSMODE1NX
LVCMOS mode select for OUTPUT 1 Negative Pin.
Output 1
EEPROM
(X,Y) = 00: Active, 10: Inverting, 11: Low, 01: 3-State
29
25
CMOSMODE1NY
RAM BITS
OUTPUT TYPE
30
26
OUTBUFSEL1X
Output 1
22
23
24
25
26
27
EEPROM
LVPECL
0
0
0
0
0
1
LVDS
0
1
0
1
1
1
31
27
OUTBUFSEL1Y
Output 1
LVCMOS
See Settings Above(1)
0
0
EEPROM
All Outputs Disabled
0
1
0
1
1
0
(1)
Use description for bits 22, 23, 24, and 25 for setting the LVCMOS outputs.
22
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Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): CDCE72010



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