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CDCE72010 Scheda tecnica(PDF) 23 Page - Texas Instruments

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Il numero della parte CDCE72010
Spiegazioni elettronici  Ten Output High Performance Clock Synchronizer, Jitter Cleaner, and Clock Distributor
PDF  70 Pages
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Produttore elettronici  TI [Texas Instruments]
Homepage  http://www.ti.com
Logo TI - Texas Instruments

CDCE72010 Scheda tecnica(HTML) 23 Page - Texas Instruments

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CDCE72010
www.ti.com...................................................................................................................................................................................................... SCAS858 – JUNE 2008
Register 2: SPI Mode
SPI
RAM
POWER UP
BIT NAME
RELATED BLOCK
DESCRIPTION/FUNCTION
BIT
BIT
CONDITION
0
A0
Address 0
0
1
A1
Address 1
1
2
A2
Address 2
0
3
A3
Address 3
0
4
0
DLYM0
Reference phase delay M bit0
5
1
DLYM1
DELAY M
Reference phase delay M bit1
EEPROM
6
2
DLYM2
Reference phase delay M bit2
7
3
DLYN0
Feedback phase delay N bit0
8
4
DLYN1
DELAY N
Feedback phase delay N bit1
EEPROM
9
5
DLYN2
Feedback phase delay N bit2
10
6
PH2ADJC0
11
7
PH2ADJC1
12
8
PH2ADJC2
13
9
PH2ADJC3
Output 2
Coarse phase adjust select for output divider 2
EEPROM
14
10
PH2ADJC4
15
11
PH2ADJC5
16
12
PH2ADJC6
17
13
OUT2DIVRSEL0
18
14
OUT2DIVRSEL1
19
15
OUT2DIVRSEL2
Output Divider 2 ratio select
20
16
OUT2DIVRSEL3
Output 2
EEPROM
(seeTable 7)
21
17
OUT2DIVRSEL4
22
18
OUT2DIVRSEL5
23
19
OUT2DIVRSEL6
When set to 0, the divider is disabled
24
20
EN2DIV
Output 2
EEPROM
When set to 1, the divider is enabled
25
21
PECL2HISWING
Output 2
High Output Voltage Swing in LVPECL Mode if set to 1
EEPROM
26
22
CMOSMODE2PX
LVCMOS mode select for OUTPUT 2 Positive Pin.
Output 2
EEPROM
(X,Y) = 00: Active, 10: Inverting, 11: Low, 01: 3-State
27
23
CMOSMODE2PY
28
24
CMOSMODE2NX
LVCMOS mode select for OUTPUT 2 Negative Pin.
Output 2
EEPROM
(X,Y) = 00: Active, 10: Inverting, 11: Low, 01: 3-State
29
25
CMOSMODE2NY
RAM BITS
OUTPUT TYPE
30
26
OUTBUFSEL2X
Output 2
22
23
24
25
26
27
EEPROM
LVPECL
0
0
0
0
0
1
LVDS
0
1
0
1
1
1
31
27
OUTBUFSEL2Y
Output 2
LVCMOS
See Settings Above(1)
0
0
EEPROM
All Outputs Disabled
0
1
0
1
1
0
(1)
Use description for bits 22, 23, 24, and 25 for setting the LVCMOS outputs.
Copyright © 2008, Texas Instruments Incorporated
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Product Folder Link(s): CDCE72010



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