H8SSLASH2214 datasheet(369/936 Pages) RENESAS

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Section 9 I/O Ports

Rev.4.00 Sep. 18, 2008 Page 309 of 872

REJ09B0189-0400

9.5.2

Table 9.7 shows the port 7 register configuration.

Table 9.7

Port 7 Registers

Name

Abbreviation

R/W

Initial Value

Address*

Port 7 data direction register

P7DDR

H'00

H'FE36

Port 7 data register

P7DR

R/W

H'00

H'FF06

Port 7 register

PORT7

Undefined

H'FFB6

External module connection output pin

select register

OPINSEL

R/W

B'-000----

H'FE4E

Note: * Lower 16 bits of the address.

(1) Port 7 Data Direction Register (P7DDR)

P77DDR

P76DDR

P75DDR

P74DDR

P73DDR

P70DDR

P72DDR

P71DDR

Bit

Initial value :

R/W

P7DDR is an 8-bit write-only register, the individual bits of which specify input or output for the

pins of port 7. P7DDR cannot be read; if it is, an undefined value will be read.

Setting a P7DDR bit to 1 makes the corresponding port 7 pin an output pin, while clearing the bit

to 0 makes the pin an input pin.

Since this register is a write-only register, do not use bit manipulation instructions to write to this

P7DDR is initialized to H'00 by a power-on reset and in hardware standby mode. It retains its

previous state after a manual reset and in software standby mode. As the 8-bit timer and SCI are

initialized by a manual reset, the pin states in this case are determined by the P7DDR and P7DR

specifications.

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