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H8S/2214 Scheda tecnica(PDF) 385 Page - Renesas Technology Corp |
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H8S/2214 Scheda tecnica(HTML) 385 Page - Renesas Technology Corp |
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385 / 936 page ![]() Section 9 I/O Ports Rev.4.00 Sep. 18, 2008 Page 325 of 872 REJ09B0189-0400 PBPCR is an 8-bit readable/writable register that controls the MOS input pull-up function incorporated into port B on a bit-by-bit basis. PBPCR is valid for port input and TPU input pins. When a PBDDR bit is cleared to 0 (input port setting), setting the corresponding PBPCR bit to 1 turns on the MOS input pull-up for the corresponding pin. PBPCR is initialized to H'00 by a power-on reset and in hardware standby mode. It retains its previous state after a manual reset and in software standby mode. 9.8.3 Pin Functions Port B pins also function as address output pins (A15 to A8). Port B pin functions are shown in table 9.14. Table 9.14 Port B Pin Functions Pin Pin Functions and Selection Method PB7/A15 The pin function is switched as shown below according to the combination of the operating mode, PFCR setting, and bit PB7DDR. Operating mode Modes 4 to 6 AE3 to AE0 in PFCR B'1xxx Other than B'1xxx PB7DDR — 0 1 Pin function A15 output PB7 input PB7 output Operating mode Mode 7 AE3 to AE0 in PFCR — PB7DDR 0 1 Pin function PB7 input PB7 output |
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