H8SSLASH2214 datasheet(391/936 Pages) RENESAS

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Section 9 I/O Ports

Rev.4.00 Sep. 18, 2008 Page 331 of 872

REJ09B0189-0400

9.9.2

Table 9.16 shows the port C register configuration.

Table 9.16

Port C Registers

Name

Abbreviation

R/W

Initial Value

Address*

Port C data direction register

PCDDR

H'00

H'FE3B

Port C data register

PCDR

R/W

H'00

H'FF0B

Port C register

PORTC

Undefined

H'FFBB

Port C MOS pull-up control register

PCPCR

R/W

H'00

H'FE42

Note: * Lower 16 bits of the address.

(1) Port C Data Direction Register (PCDDR)

PC7DDR

PC6DDR

PC5DDR

PC4DDR

PC3DDR

PC0DDR

PC2DDR

PC1DDR

Bit

Initial value :

R/W

PCDDR is an 8-bit write-only register, the individual bits of which specify input or output for the

pins of port C. PCDDR cannot be read; if it is, an undefined value will be read.

Setting a PCDDR bit to 1 makes the corresponding port C pin an output pin, while clearing the bit

to 0, makes the pin an input pin. Since this register is a write-only register, do not use bit

manipulation instructions to write to this register. See section 2.10.4, Access Methods for

Registers with Write-Only Bits.

PCDDR is initialized to H'00 by a power-on reset and in hardware standby mode. It retains its

previous state after a manual reset and in software standby mode. The OPE bit in SBYCR is used

to select whether the address output pins retain their output state or become high-impedance when

a transition is made to software standby mode.

(a) Modes 4 and 5

Port C pins are address outputs regardless of the PCDDR settings.

(b) Mode 6

Setting a PCDDR bit to 1 makes the corresponding port C pin an address output, while

clearing the bit to 0 makes the pin an input port.

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