H8SSLASH2214 datasheet(392/936 Pages) RENESAS

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Section 9 I/O Ports

Rev.4.00 Sep. 18, 2008 Page 332 of 872

REJ09B0189-0400

Setting a PCDDR bit to 1 makes the corresponding port C pin an output port, while clearing

the bit to 0 makes the pin an input port.

(2) Port C Data Register (PCDR)

PC7DR

R/W

PC6DR

R/W

PC5DR

R/W

PC4DR

R/W

PC3DR

R/W

PC0DR

R/W

PC2DR

R/W

PC1DR

R/W

Bit

Initial value :

R/W

PCDR is an 8-bit readable/writable register that stores output data for the port C pins (PC7 to

PC0).

PCDR is initialized to H'00 by a power-on reset and in hardware standby mode. It retains its

previous state after a manual reset and in software standby mode.

(3) Port C Register (PORTC)

PC7

—*

PC6

—*

PC5

—*

PC4

—*

PC3

—*

PC0

—*

PC2

—*

PC1

—*

Bit

Initial value :

R/W

Note: * Determined by the state of pins PC7 to PC0.

PORTC is an 8-bit read-only register that shows the pin states. It cannot be written to. Writing of

output data for the port C pins (PC7 to PC0) must always be performed on PCDR.

If a port C read is performed while PCDDR bits are set to 1, the PCDR values are read. If a port C

read is performed while PCDDR bits are cleared to 0, the pin states are read.

After a power-on reset and in hardware standby mode, PORTC contents are determined by the pin

states, as PCDDR and PCDR are initialized. PORTC retains its previous state after a manual reset

and in software standby mode.

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