H8SSLASH2214 datasheet(432/936 Pages) RENESAS

Il numero della parte	H8S/2214

Spiegazioni elettronici	16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series

PDF	936 Pages

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Produttore elettronici	RENESAS [Renesas Technology Corp]

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Section 10 16-Bit Timer Pulse Unit (TPU)

Rev.4.00 Sep. 18, 2008 Page 372 of 872

REJ09B0189-0400

10.2.3

Timer I/O Control Register (TIOR)

IOB3

R/W

IOB2

R/W

IOB1

R/W

IOB0

R/W

IOA3

R/W

IOA0

R/W

IOA2

R/W

IOA1

R/W

Bit

Initial value

R/W

Channel 0: TIOR0H

Channel 1: TIOR1

Channel 2: TIOR2

IOD3

R/W

IOD2

R/W

IOD1

R/W

IOD0

R/W

IOC3

R/W

IOC0

R/W

IOC2

R/W

IOC1

R/W

Channel 0: TIOR0L

Note:

When TGRC or TGRD is designated for buffer operation, this setting is invalid and the

Bit

Initial value

R/W

The TIOR registers are 8-bit registers that control the TGR registers. The TPU has four TIOR

registers, two each for channel 0, and one each for channels 1 and 2. The TIOR registers are

initialized to H'00 by a reset, and in hardware standby mode.

Care is required since TIOR is affected by the TMDR setting. The initial output specified by TIOR

is valid when the counter is stopped (the CST bit in TSTR is cleared to 0). Note also that, in PWM

mode 2, the output at the point at which the counter is cleared to 0 is specified.

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