H8SSLASH2214 datasheet(681/936 Pages) RENESAS

681 / 936 page

Section 17 Power-Down Modes

Rev.4.00 Sep. 18, 2008 Page 621 of 872

REJ09B0189-0400

Bits 6 to 4—Standby Timer Select 2 to 0 (STS2 to STS0): These bits select the time the MCU

waits for the clock to stabilize when software standby mode is cleared and a transition is made to

high-speed mode or medium-speed mode by means of a specific interrupt or instruction. With

crystal oscillation, refer to table 17.4 and make a selection according to the operating frequency so

that the standby time is at least 8 ms (the oscillation stabilization time). With an external clock,

any selection can be made*.

Note: * In the F-ZTAT version, a 16-state standby time cannot be used with an external clock.

Use 2048 states or more.

Bit 6

Bit 5

Bit 4

STS2

STS1

STS0

Description

Standby time = 8192 states

(Initial value)

Standby time = 16384 states

Standby time = 32768 states

Standby time = 65536 states

Standby time = 131072 states

Standby time = 262144 states

Standby time = 2048 states

Standby time = 16 states*

Note: * Cannot be used in the F-ZTAT version.

Bit 2 to 0—Reserved: This bit cannot be modified and is always read as 0.

Bit 3—Output Port Enable (OPE): Specifies whether the address bus and bus control signals

(

CS0 to CS7, AS, RD, HWR, and LWR) retain their output state or go to the high-impedance state

in software standby mode.

Bit 3

OPE

Description

In software standby mode, address bus and bus control signals are high-impedance

In software standby mode, address bus and bus control signals retain their output

state

(Initial value)

H8S/2214 Scheda tecnica(PDF) 681 Page - Renesas Technology Corp