H8SSLASH2214 datasheet(147/936 Pages) RENESAS

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Section 4 Exception Handling

Rev.4.00 Sep. 18, 2008 Page 87 of 872

REJ09B0189-0400

4.4

Interrupts

Interrupt exception handling can be requested by nine external sources (NMI, IRQ7 to IRQ0),

eight external expansion sources (EXIRQ7 to EXIRQ0), and 31 internal sources in the on-chip

supporting modules. Figure 4.4 classifies the interrupt sources and the number of interrupts of

each type.

The on-chip supporting modules that can request interrupts include the watchdog timer (WDT),

16-bit timer-pulse unit (TPU), serial communication interface (SCI), data transfer controller

(DTC), and DMA controller (DMAC). Each interrupt source has a separate vector address.

NMI is the highest-priority interrupt. Interrupts are controlled by the interrupt controller. The

interrupt controller has two interrupt control modes and can assign interrupts other than NMI to

eight priority/mask levels to enable multiplexed interrupt control.

For details of interrupts, see section 5, Interrupt Controller.

Interrupts

External

interrupts

Internal

interrupts

NMI (1)

IRQ7 to IRQ0 (8)

WDT* (1)

TPU (13)

SCI (12)

DTC (1)

DMAC (4)

Numbers in parentheses are the numbers of interrupt sources.

* When the watchdog timer is used as an interval timer, it generates

an interrupt request at each counter overflow.

Notes:

External

expansion

interrupts:

EXIRQ7 to EXIRQ0 (8)

Figure 4.4 Interrupt Sources and Number of Interrupts

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