H8SSLASH2214 datasheet(143/936 Pages) RENESAS

Il numero della parte	H8S/2214

Spiegazioni elettronici	16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series

PDF	936 Pages

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Produttore elettronici	RENESAS [Renesas Technology Corp]

Homepage	http://www.renesas.com

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143 / 936 page

Section 4 Exception Handling

Rev.4.00 Sep. 18, 2008 Page 83 of 872

REJ09B0189-0400

A reset caused by the watchdog timer can also be of either of two types: a power-on reset or a

manual reset.

When the

MRES pin is used, MRES pin input must be enabled by setting the MRESE bit to 1 in

SYSCR.

4.2.3

Reset Sequence

The H8S/2214 Group enters the reset state when the

RES or MRES pin goes low.

To ensure that the H8S/2214 Group is reset, hold the

RES or MRES pin low for at least 20 ms at

power-up. To reset the H8S/2214 Group during operation, hold the

RES or MRES pin low for at

least 20 states.

When the

RES or MRES pin goes high after being held low for the necessary time, the chip starts

reset exception handling as follows:

1. The internal state of the CPU and the registers of the on-chip supporting modules are

initialized, the T bit is cleared to 0 in EXR, and the I bit is set to 1 in EXR and CCR.

2. The reset exception handling vector address is read and transferred to the PC, and program

execution starts from the address indicated by the PC.

Figures 4.2 and 4.3 show examples of the reset sequence.

H8S/2214 Scheda tecnica(PDF) 143 Page - Renesas Technology Corp