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H8S/2214 Scheda tecnica(PDF) 200 Page - Renesas Technology Corp |
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H8S/2214 Scheda tecnica(HTML) 200 Page - Renesas Technology Corp |
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200 / 936 page ![]() Section 6 Bus Controller Rev.4.00 Sep. 18, 2008 Page 140 of 872 REJ09B0189-0400 (2) 16-Bit Access Space Figure 6.5 illustrates data alignment control for the 16-bit access space. With the 16-bit access space, the upper data bus (D15 to D8) and lower data bus (D7 to D0) are used for accesses. The amount of data that can be accessed at one time is one byte or one word, and a longword transfer instruction is executed as two word transfer instructions. In byte access, whether the upper or lower data bus is used is determined by whether the address is even or odd. The upper data bus is used for an even address, and the lower data bus for an odd address. D15 D8 D7 D0 Upper data bus Byte size Word size 1st bus cycle 2nd bus cycle Longword size • Even address Byte size • Odd address Lower data bus Figure 6.5 Access Sizes and Data Alignment Control (16-Bit Access Space) |
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