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H8S/2214 Scheda tecnica(PDF) 201 Page - Renesas Technology Corp |
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H8S/2214 Scheda tecnica(HTML) 201 Page - Renesas Technology Corp |
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201 / 936 page ![]() Section 6 Bus Controller Rev.4.00 Sep. 18, 2008 Page 141 of 872 REJ09B0189-0400 6.4.3 Valid Strobes Table 6.4 shows the data buses used and valid strobes for the access spaces. In a read, the RD signal is valid without discrimination between the upper and lower halves of the data bus. In a write, the HWR signal is valid for the upper half of the data bus, and the LWR signal for the lower half. Table 6.4 Data Buses Used and Valid Strobes Area Access Size Read/ Write Address Valid Strobe Upper Data Bus (D15 to D8) Lower data bus (D7 to D0) 8-bit access Byte Read — RD Valid Invalid space Write — HWR Hi-Z 16-bit access Byte Read Even RD Valid Invalid space Odd Invalid Valid Write Even HWR Valid Hi-Z Odd LWR Hi-Z Valid Word Read — RD Valid Valid Write — HWR, LWR Valid Valid Notes: Hi-Z: High impedance. Invalid: Input state; input value is ignored. |
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