H8SSLASH2214 datasheet(262/936 Pages) RENESAS

Il numero della parte	H8S/2214

Spiegazioni elettronici	16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series

PDF	936 Pages

Scroll/Zoom	100%

Produttore elettronici	RENESAS [Renesas Technology Corp]

Homepage	http://www.renesas.com

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262 / 936 page

Section 7 DMA Controller

Rev.4.00 Sep. 18, 2008 Page 202 of 872

REJ09B0189-0400

Bit 4—Data Transfer Enable 0 (DTE0): Enables or disables data transfer on channel 0.

Bit 4

DTE0

Description

Data transfer disabled

(Initial value)

Data transfer enabled

Bits 3 and 1—Data Transfer Interrupt Enable B (DTIEB): These bits enable or disable an

interrupt to the CPU or DTC when transfer is interrupted. If the DTIEB bit is set to 1 when

DTME = 0, the DMAC regards this as indicating a break in the transfer, and issues a transfer

break interrupt request to the CPU or DTC.

A transfer break interrupt can be canceled either by clearing the DTIEB bit to 0 in the interrupt

handling routine, or by performing processing to continue transfer by setting the DTME bit to 1.

Bit 3—Data Transfer Interrupt Enable 1B (DTIE1B): Enables or disables the channel 1

transfer break interrupt.

Bit 3

DTIE1B

Description

Transfer break interrupt disabled

(Initial value)

Transfer break interrupt enabled

Bit 1—Data Transfer Interrupt Enable 0B (DTIE0B): Enables or disables the channel 0

transfer break interrupt.

Bit 1

DTIE0B

Description

Transfer break interrupt disabled

(Initial value)

Transfer break interrupt enabled

H8S/2214 Scheda tecnica(PDF) 262 Page - Renesas Technology Corp