H8SSLASH2214 datasheet(263/936 Pages) RENESAS

Il numero della parte	H8S/2214

Spiegazioni elettronici	16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series

PDF	936 Pages

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Produttore elettronici	RENESAS [Renesas Technology Corp]

Homepage	http://www.renesas.com

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Section 7 DMA Controller

Rev.4.00 Sep. 18, 2008 Page 203 of 872

REJ09B0189-0400

Bits 2 and 0—Data Transfer End Interrupt Enable A (DTIEA): These bits enable or disable

an interrupt to the CPU or DTC when transfer ends. If DTIEA bit is set to 1 when DTE = 0, the

DMAC regards this as indicating the end of a transfer, and issues a transfer end interrupt request to

the CPU or DTC.

A transfer end interrupt can be canceled either by clearing the DTIEA bit to 0 in the interrupt

handling routine, or by performing processing to continue transfer by setting the transfer counter

and address register again, and then setting the DTE bit to 1.

Bit 2—Data Transfer Interrupt Enable 1A (DTIE1A): Enables or disables the channel 1

transfer end interrupt.

Bit 2

DTIE1A

Description

Transfer end interrupt disabled

(Initial value)

Transfer end interrupt enabled

Bit 0—Data Transfer Interrupt Enable 0A (DTIE0A): Enables or disables the channel 0

transfer end interrupt.

Bit 0

DTIE0A

Description

Transfer end interrupt disabled

(Initial value)

Transfer end interrupt enabled

H8S/2214 Scheda tecnica(PDF) 263 Page - Renesas Technology Corp