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H8S/2224 Scheda tecnica(PDF) 430 Page - Renesas Technology Corp |
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H8S/2224 Scheda tecnica(HTML) 430 Page - Renesas Technology Corp |
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430 / 1071 page ![]() Section 10 I/O Ports Rev. 5.00 Aug 08, 2006 page 344 of 982 REJ09B0054-0500 10.9.2 Port D Data Register (PDDR) PDDR stores output data for port D pins. Bit Bit Name Initial Value R/W Description 7 PD7DR 0 R/W 6 PD6DR 0 R/W 5 PD5DR 0 R/W 4 PD4DR 0 R/W 3 PD3DR 0 R/W 2 PD2DR 0 R/W 1 PD1DR 0 R/W 0 PD0DR 0 R/W Output data for a pin is stored when the pin is specified as a general purpose I/O port. 10.9.3 Port D Register (PORTD) PORTD shows port D pin states. This register cannot be modified. Bit Bit Name Initial Value R/W Description 7PD7 * R 6PD6 * R 5PD5 * R 4PD4 * R 3PD3 * R 2PD2 * R 1PD1 * R 0PD0 * R If a port D read is performed while PDDDR bits are set to 1, the PDDR values are read. If a port D read is performed while PDDDR bits are cleared to 0, the pin states are read. Note: * Determined by the states of pins PD7 to PD0. |
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