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H8S/2224 Scheda tecnica(PDF) 433 Page - Renesas Technology Corp |
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H8S/2224 Scheda tecnica(HTML) 433 Page - Renesas Technology Corp |
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433 / 1071 page ![]() Section 10 I/O Ports Rev. 5.00 Aug 08, 2006 page 347 of 982 REJ09B0054-0500 10.10.1 Port E Data Direction Register (PEDDR) PEDDR specifies input or output of the port E pins using the individual bits. PEDDR cannot be read; if it is, an undefined value will be read. This register is a write-only register, and cannot be written by bit manipulation instruction. For details, see section 2.9.4, Access Methods for Registers with Write-Only Bits. Bit Bit Name Initial Value R/W Description 7 PE7DDR 0 W 6 PE6DDR 0 W 5 PE5DDR 0 W 4 PE4DDR 0 W 3 PE3DDR 0 W 2 PE2DDR 0 W 1 PE1DDR 0 W 0 PE0DDR 0 W When a pin is specified as a general purpose I/O port, setting this bit to 1 makes the corresponding port E pin an output port. Clearing this bit to 0 makes the pin an input port. 10.10.2 Port E Data Register (PEDR) PEDR stores output data for port E pins. PEDR stores output data for port E pins. Bit Bit Name Initial Value R/W Description 7 PE7DR 0 R/W 6 PE6DR 0 R/W 5 PE5DR 0 R/W 4 PE4DR 0 R/W 3 PE3DR 0 R/W 2 PE2DR 0 R/W 1 PE1DR 0 R/W 0 PE0DR 0 R/W Output data for a pin is stored when the pin is specified as a general purpose I/O port. |
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