H8SSLASH2224 datasheet(675/1071 Pages) RENESAS

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Section 15 Serial Communication Interface (SCI)

Rev. 5.00 Aug 08, 2006 page 589 of 982

REJ09B0054-0500

15.4.4

SCI Initialization (Asynchronous Mode)

Before transmitting and receiving data, you should first clear the TE and RE bits in SCR to 0, then

initialize the SCI as described in figure 15.8. When the operating mode, or transfer format, is

changed for example, the TE and RE bits must be cleared to 0 before making the change using the

following procedure. When the TE bit is cleared to 0, the TDRE flag is set to 1. Note that clearing

the RE bit to 0 does not initialize the contents of the RDRF, PER, FER, and ORER flags, or the

contents of RDR. When the external clock is used in asynchronous mode, the clock must be

supplied even during initialization.

Wait

Notes: 1. Perform this set operation with the RxD pin in the 1 state. If the RE bit is set to 1 with the RxD pin

in the 0 state, it may be misinterpreted as a start bit.

2. Supported only by the H8S/2239 Group.

Start initialization

Set data transfer format in

SMR and SCMR

[1]

Set CKE1 and CKE0 bits in SCR

(TE, RE bits 0)

Yes

Set value in BRR

Clear TE and RE bits in SCR to 0

[2]

[3]

Set TE and RE*1 bits in

SCR to 1, and set RIE, TIE, TEIE,

and MPIE bits

[4]

1-bit interval elapsed?

[1] Set the clock selection in SCR.

Be sure to clear bits RIE, TIE,

TEIE, MPIE, TE, and RE, to 0.

When the clock is selected in

asynchronous mode, it is output

immediately after SCR settings are

made.

[2] Set the data transfer format in SMR

and SCMR.

[3] Write a value corresponding to the

bit rate to BRR. Not necessary if

an external clock or an average

transfer rate clock by bits ACS2 to

ACS0 in SEMR_0*2 is used.

[4] Wait at least one bit interval, then

set the TE bit or RE bit in SCR to 1.

Also set the RIE, TIE, TEIE, and

MPIE bits.

Setting the TE and RE bits enables

the TxD and RxD pins to be used.

Figure 15.8 Sample SCI Initialization Flowchart

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