H8SSLASH2224 datasheet(680/1071 Pages) RENESAS

680 / 1071 page

Section 15 Serial Communication Interface (SCI)

Rev. 5.00 Aug 08, 2006 page 594 of 982

REJ09B0054-0500

Yes

<End>

[1]

Initialization

Start reception

[2]

Yes

Read RDRF flag in SSR

[4]

[5]

Clear RE bit in SCR to 0

Read ORER, PER, and

FER flags in SSR

Error processing

(Continued on next page)

[3]

Read receive data in RDR, and

clear RDRF flag in SSR to 0

Yes

PER

∨ FER ∨ ORER = 1

RDRF = 1

All data received?

[1] SCI initialization:

The RxD pin is automatically

designated as the receive data input

pin.

[2] [3] Receive error processing and break

detection:

If a receive error occurs, read the

ORER, PER, and FER flags in SSR to

identify the error. After performing the

appropriate error processing, ensure

that the ORER, PER, and FER flags are

all cleared to 0. Reception cannot be

resumed if any of these flags are set to

1. In the case of a framing error, a

break can be detected by reading the

value of the input port corresponding to

the RxD pin.

[4] SCI status check and receive data read:

Read SSR and check that RDRF = 1,

then read the receive data in RDR and

clear the RDRF flag to 0. Transition of

the RDRF flag from 0 to 1 can also be

identified by an RXI interrupt.

[5] Serial reception continuation procedure:

To continue serial reception, before the

stop bit for the current frame is

received, read the RDRF flag, read

RDR, and clear the RDRF flag to 0.

The RDRF flag is cleared automatically

when the DMAC*

1 or the DTC*2 is

activated by an RXI interrupt and the

RDR value is read.

Notes: 1. Supported only by the H8S/2239

Group.

2. The case, in which the DTC

automatically clears the RDRF

flag, occurs only when DISEL in

DTC is 0 with the transfer counter

not being 0. Therefore, the RDRF

flag should be cleared by CPU

when DISEL is 1, or when DISEL

is 0 with the transfer counter

being 0.

Figure 15.12 Sample Serial Reception Data Flowchart (1)

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