H8SSLASH2224 datasheet(796/1071 Pages) RENESAS

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Section 18 D/A Converter

Rev. 5.00 Aug 08, 2006 page 710 of 982

REJ09B0054-0500

18.4

Operation

Two channels of the D/A converter can perform conversion individually.

When the DAOE bit in DACR is set to 1, D/A conversion is enabled and the conversion results are

output.

An example of D/A conversion of channel 0 is shown below. The operation timing is shown in

figure 18.2.

1. Write conversion data to DADR0.

2. When the DAOE0 bit in DACR is set to 1, D/A conversion starts. After the interval of tDCONV,

the conversion results are output from the analog output pin DA0. The conversion results are

output continuously until DADR0 is modified or DAOE0 bit is cleared to 0. The output value

is calculated by the following formula:

(DADR contents) / 256

× Vref

3. Conversion starts immediately after DADR0 is modified. After the interval of tDCONV,

conversion results are output.

4. When the DAOE bit is cleared to 0, analog output is disabled.

DADR0

write cycle

DACR

write cycle

DADR0

write cycle

DACR

write cycle

Address

DADR0

DAOE0

DA0

Conversion data (1)

Conversion data (2)

High impedance state

Conversion result (1)

Conversion result (2)

tDCONV

Legend:

tDCONV: D/A conversion time

Figure 18.2 D/A Converter Operation Example

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