H8SSLASH2224 datasheet(810/1071 Pages) RENESAS

810 / 1071 page

Section 20 Flash Memory (F-ZTAT Version)

Rev. 5.00 Aug 08, 2006 page 724 of 982

REJ09B0054-0500

20.4

Input/Output Pins

The flash memory is controlled by means of the pins shown in table 20.2.

Table 20.2 Pin Configuration

Pin Name

I/O

Function

RES

Input

Reset

FWE

Input

Flash program/erase protection by hardware

MD2

Input

Sets this LSI’s operating mode

MD1

Input

Sets this LSI’s operating mode

MD0

Input

Sets this LSI’s operating mode

PF0

Input

Sets MCU operating mode in programmer mode

P16

Input

Sets MCU operating mode in programmer mode

P14

Input

Sets MCU operating mode in programmer mode

TxD*

Output

Serial transmit data output

RxD*

Input

Serial receive data input

Note:

* SCI_2 (TxD2, RxD2) is used for the H8S/2258, H8S/2239, H8S/2238B, and

H8S/2238R, and SCI_0 (TxD0, RxD0) for the H8S/2227.

20.5

The flash memory has the following registers.

• Flash memory control register 1 (FLMCR1)

• Flash memory control register 2 (FLMCR2)

• Erase block register 1 (EBR1)

• Erase block register 2 (EBR2)

• RAM emulation register (RAMER)

• Flash memory power control register (FLPWCR)

• Serial control register X (SCRX)

The registers described above are not present in the masked ROM version. If a register described

above is read in the masked ROM version, an undefined value will be returned.

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