H8SSLASH2224 datasheet(871/1071 Pages) RENESAS

871 / 1071 page

Section 24 Power-Down Modes

Rev. 5.00 Aug 08, 2006 page 785 of 982

REJ09B0054-0500

4. Supported only by the H8S/2258 Group.

5. The analog output value does not satisfy the specified D/A absolute accuracy when D/A

is halted (retained). However, the H8S/2258 Group, H8S/2238B, and H8S/2236B

satisfy the specified D/A absolute accuracy.

Program-halted state

Program execution state

SCK2 to

SCK0 = 0

SCK2 to

SCK0

≠ 0

SLEEP instruction

SSBY = 1, PSS = 1

DTON = 1, LSON = 1

Clock switching

exception processing

SLEEP instruction

SSBY = 1, PSS = 1

DTON = 1, LSON = 0

After the oscillation

settling time

(STS2 to 0), clock

switching exception

processing

SLEEP instruction

SLEEP

instruction

External

interrupt*3

All interrupt

SLEEP

instruction

SLEEP

instruction

SLEEP instruction

Interrupt*1

LSON bit = 0

Interrupt*2

Interrupt*1

LSON bit = 1

STBY pin = High

RES pin = Low

STBY pin = Low

SSBY = 0, LSON = 0

SSBY = 1,

PSS = 0, LSON = 0

SSBY = 0,

PSS = 1, LSON = 1

SSBY = 1,

PSS = 1, DTON = 0

RES pin = High

MRES pin = High

: Transition after exception processing

: Low power dissipation mode

Power on

reset state

Manual

reset state

Reset state

High-speed mode

(main clock)

Medium-speed

mode

(main clock)

Sub-active mode

(subclock)

Sub-sleep mode

(subclock)

Hardware

standby mode

Software

standby mode

Sleep mode

(main clock)

Watch mode

(subclock)

Notes:

NMI, IRQ7 to IRQ0, and WDT1 interrupts.

NMI, IRQ7 to IRQ0, and WDT1, WDT0, and TMR3 to TMR0 interrupts.

NMI, IRQ7 to IRQ0

When a transition is made between modes by means of an interrupt, the transition cannot be made

on interrupt source generation alone. Ensure that interrupt handling is performed after accepting the

interrupt request.

From any state except hardware standby mode, a transition to the reset state occurs when

RES is

driven Low. At any state except hardware standby mode and power-on reset state, a transition to

the manual reset state occurs when the

MRES pin is driven Low.

From any state, a transition to hardware standby mode occurs when

STBY is driven low.

Always select high-speed mode before making a transition to watch mode or sub-active mode.

Figure 24.1 Mode Transition Diagram

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