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H8S/2224 Scheda tecnica(PDF) 938 Page - Renesas Technology Corp |
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H8S/2224 Scheda tecnica(HTML) 938 Page - Renesas Technology Corp |
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938 / 1071 page ![]() Section 27 Electrical Characteristics Rev. 5.00 Aug 08, 2006 page 852 of 982 REJ09B0054-0500 Table 27.4 Bus Driving Characteristics Conditions: VCC = 4.0 V to 5.5 V, AVCC = 4.0 V to 5.5 V, Vref = 4.0 V to AVCC, VSS = AVSS = 0 V, Ta = –20°C to +75°C (regular specifications), Ta = –40°C to +85°C (wide-range specifications)* Objective pins: SCL1, SCL0, SDA1, and SDA0 Item Symbol Min Typ Max Unit Test Conditions VT – VCC × 0.3 VCC = 4.0 V to 5.5 V VT + VCC × 0.7 VCC = 4.0 V to 5.5 V Schmitt trigger input voltage VT + – VT– 0.4 V VCC = 4.0 V to 5.5 V Input high voltage VIH VCC × 0.7 VCC + 0.5 V VCC = 4.0 V to 5.5 V Input low voltage VIL –0.5 VCC × 0.3 V VCC = 4.0 V to 5.5 V 0.5 IOL = 8 mA Output low voltage VOL 0.4 V IOL = 3 mA Input capacitance Cin 20 pF Vin = 0 V, f = 1 MHz, Ta = 25°C Three states leakage current (off) | ITSI | 1.0 µA Vin = 0.5 V to VCC – 0.5 V SCL, SDA output falling time tof 20 + 0.1 Cb 250 ns VCC = 4.0 V to 5.5 V Note: * If the A/D or D/A converter is not used, the AVCC, Vref, and AVSS pins should not be open. Even if the A/D or D/A converter is not used, connect the AVCC and Vref pins to VCC and supply 4.0 V to 5.5 V. In this case, Vref ≤ AVCC. |
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