H8SSLASH2224 datasheet(227/1071 Pages) RENESAS

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Section 5 Interrupt Controller

Rev. 5.00 Aug 08, 2006 page 141 of 982

REJ09B0054-0500

Vector

Address*

Interrupt Source

Origin of

Interrupt Source

Vector

Number

Advanced

Mode

IPR*

Priority

8-bit timer channel 3*

CMIA3 (compare-match A3)

H'0180

IPRL6 to IPRL4

High

CMIB3 (compare-match B3)

H'0184

OVI3 (overflow 3)

H'0188



Reserved

H'018C

IIC channel 0*

(option)

IICI0 (1-byte transmission/

reception completion)

100

H'0190

Reserved

101

H'0194

IPRL2 to IPRL0

IICI1 (1-byte transmission/

reception completion)

102

H'0198

IIC channel 1*

(option)

Reserved

103

H'019C

IPRL2 to IPRL0

IEB*

IEBSI (receive status)

104

H'01A0

IPRM6 to IPRM4

IERxI (RxRDY)

105

H'01A4

IETxI (TxRDY)

106

H'01A8

TETSI (transmit status)

107

H'01AC

ERI3 (receive error 3)

120

H'01E0

IPRO6 to IPRO4

RXI3 (receive completion 3)

121

H'01E4

TXI3 (transmit data empty 3)

122

H'01E8

SCI

channel 3

TEI3 (transmit end )

123

H'01EC

Low

Notes: 1. Lower 16 bits of the start address.

2. IPR6 to IPR4, and IPR2 to IPR0 bits are reserved, because these bits have no

corresponding interruption. These bits are always read as 0 and cannot be modified.

3. Not available in the H8S/2227 Group.

4. Not available in the H8S/2237 Group and H8S/2227 Group.

5. Supported only by the H8S/2239 Group.

6. Supported only by the H8S/2258 Group.

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