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FS23 Scheda tecnica(PDF) 202 Page - NXP Semiconductors |
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FS23 Scheda tecnica(HTML) 202 Page - NXP Semiconductors |
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202 / 230 page ![]() NXP Semiconductors FS23 Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers 24.21 OTP_OVUV_CFG1 Bit 7 6 5 4 3 2 1 0 Write Read V1MON_UVTH_OTP V1MON_OVTH_OTP Reset 0 0 0 0 0 0 0 0 Table 233. OTP_OVUV_CFG1 register bit allocation Bit Symbol Description Select V1MON OV threshold 0000 V1MON OV = 102.5 % 0001 V1MON OV = 103 % 0010 V1MON OV = 103.5 % 0011 V1MON OV = 104 % 0100 V1MON OV = 104.5 % 0101 V1MON OV = 105 % 0110 V1MON OV = 105.5 % 0111 V1MON OV = 106 % 1000 V1MON OV = 106.5 % 1001 V1MON OV = 107 % 1010 V1MON OV = 107.5 % 1011 V1MON OV = 108 % 1100 V1MON OV = 108.5 % 1101 V1MON OV = 109 % 1110 V1MON OV = 109.5 % 1111 V1MON OV = 110 % 0 to 3 V1MON_OVTH_OTP Reset on power-on reset Select V1MON UV threshold 0000 V1MON UV = 64 % 0001 V1MON UV = 63 % 0010 V1MON UV = 96.5 % 0011 V1MON UV = 96 % 0100 V1MON UV = 95.5 % 0101 V1MON UV = 95 % 0110 V1MON UV = 94.5 % 0111 V1MON UV = 94 % 1000 V1MON UV = 93.5 % 1001 V1MON UV = 93 % 1010 V1MON UV = 92.5 % 1011 V1MON UV = 92 % 1100 V1MON UV = 91.5 % 1101 V1MON UV = 62.5 % 1110 V1MON UV = 62 % 1111 V1MON UV = 61 % 4 to 7 V1MON_UVTH_OTP Reset on power-on reset Table 234. OTP_OVUV_CFG1 register bit description FS23 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 7.0 — 16 October 2024 Document feedback 202 / 230 |
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