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FS23 Scheda tecnica(PDF) 201 Page - NXP Semiconductors |
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FS23 Scheda tecnica(HTML) 201 Page - NXP Semiconductors |
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201 / 230 page ![]() NXP Semiconductors FS23 Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers 24.20 OTP_FS_SYS_CFG Bit 7 6 5 4 3 2 1 0 Write Read Reserved Reserved INIT_CRC_ DIS_OTP FS_LPOFF_ OTP FS_DUR_ CFG_OTP WD_INF_ OTP RSTB8S_ DIS_OTP FIRST_FAULT_ EN_OTP Reset 0 0 0 0 0 0 0 0 Table 231. OTP_FS_SYS_CFG register bit allocation Bit Symbol Description Configure the first fault to send the device in Fail-safe mode 0 Do not go to FS at first fault 1 Go to FS at first fault 0 FIRST_FAULT_EN_OTP Reset on power-on reset Disable the RSTB 8 s timer 0 RSTB 8 s timer is enabled 1 RSTB 8 s timer is disabled 1 RSTB8S_DIS_OTP Reset on power-on reset Set the watchdog period as infinite 0 Watchdog period is configurable by SPI/I2C 1 Watchdog period is infinite 2 WD_INF_OTP Reset on power-on reset Configure FS state duration 0 FS state duration is 100 ms 1 FS state duration is 4 s 3 FS_DUR_CFG_OTP Reset on power-on reset Configure FS state exit 0 Automatic restart after FS state 1 Go to LPOFF after FS state 4 FS_LPOFF_OTP Reset on power-on reset Disable the INIT registers CRC protection 0 CRC is enabled 1 CRC is disabled 5 INIT_CRC_DIS_OTP Reset on power-on reset Table 232. OTP_FS_SYS_CFG register bit description FS23 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 7.0 — 16 October 2024 Document feedback 201 / 230 |
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