H8SSLASH2214 datasheet(330/936 Pages) RENESAS

Il numero della parte	H8S/2214

Spiegazioni elettronici	16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series

PDF	936 Pages

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Produttore elettronici	RENESAS [Renesas Technology Corp]

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Section 8 Data Transfer Controller (DTC)

Rev.4.00 Sep. 18, 2008 Page 270 of 872

REJ09B0189-0400

8.3.6

Repeat Mode

In repeat mode, one operation transfers one byte or one word of data.

From 1 to 256 transfers can be specified. Once the specified number of transfers have ended, the

initial state of the transfer counter and the address register specified as the repeat area is restored,

and transfer is repeated. In repeat mode the transfer counter value does not reach H'00, and

therefore CPU interrupts cannot be requested when DISEL = 0.

Table 8.6 lists the register information in repeat mode and figure 8.7 shows memory mapping in

repeat mode.

Table 8.6

Name

Abbreviation

Function

DTC source address register

SAR

Designates source address

DTC destination address register

DAR

Designates destination address

DTC transfer count register AH

CRAH

Holds number of transfers

DTC transfer count register AL

CRAL

Designates transfer count

DTC transfer count register B

CRB

Not used

Transfer

SAR or

DAR

DAR or

SAR

Repeat area

Figure 8.7 Memory Mapping in Repeat Mode

H8S/2214 Scheda tecnica(PDF) 330 Page - Renesas Technology Corp