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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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H8S/2214 Scheda tecnica(PDF) 448 Page - Renesas Technology Corp |
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H8S/2214 Scheda tecnica(HTML) 448 Page - Renesas Technology Corp |
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448 / 936 page  Section 10 16-Bit Timer Pulse Unit (TPU) Rev.4.00 Sep. 18, 2008 Page 388 of 872 REJ09B0189-0400 10.2.10 Module Stop Control Register A (MSTPCRA) 7 MSTPA7 0 R/W Bit Initial value R/W : : : 6 MSTPA6 0 R/W 5 MSTPA5 1 R/W 4 MSTPA4 1 R/W 3 MSTPA3 1 R/W 2 MSTPA2 1 R/W 1 MSTPA1 1 R/W 0 MSTPA0 1 R/W MSTPCRA is a 16-bit readable/writable register that performs module stop mode control. When the MSTPA5 bit in MSTPCR is set to 1, TPU operation stops at the end of the bus cycle and a transition is made to module stop mode. Registers cannot be read or written to in module stop mode. For details, see section 17.5, Module Stop Mode. MSTPCRA is initialized to H'3F by a reset and in hardware standby mode. It is not initialized in software standby mode. Bit 5—Module Stop (MSTPA5): Specifies the TPU module stop mode. Bit 5 MSTPA5 Description 0 TPU module stop mode cleared 1 TPU module stop mode set (Initial value) |
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