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H8S/2214 Scheda tecnica(PDF) 505 Page - Renesas Technology Corp |
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H8S/2214 Scheda tecnica(HTML) 505 Page - Renesas Technology Corp |
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505 / 936 page ![]() Section 11 Watchdog Timer (WDT) Rev.4.00 Sep. 18, 2008 Page 445 of 872 REJ09B0189-0400 (2) Writing to RSTCSR RSTCSR must be written to by a word transfer to address H'FF76. It cannot be written to with byte instructions. Figure 11.3 shows the format of data written to RSTCSR. The method of writing 0 to the WOVF bit differs from that for writing to the RSTE and RSTS bits. To write 0 to the WOVF bit, the upper byte of the written word must contain H'A5 and the lower byte must contain H'00. This clears the WOVF bit to 0, but has no effect on the RSTE and RSTS bits. To write to the RSTE and RSTS bits, the upper byte must contain H'5A and the lower byte must contain the write data. This writes the values in bits 6 and 5 of the lower byte into the RSTE and RSTS bits, but has no effect on the WOVF bit. Writing 0 to WOVF bit Writing to RSTE and RSTS bits Address: H'FF76 Address: H'FF76 H'A5 H'00 15 8 7 0 H'5A Write data 15 8 7 0 Figure 11.3 Format of Data Written to RSTCSR (Example of WDT0) (3) Reading TCNT, TCSR, and RSTCSR These registers are read in the same way as other registers. The read addresses are H'FF74 for TCSR, H'FF75 for TCNT, and H'FF77 for RSTCSR. |
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