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H8S/2214 Scheda tecnica(PDF) 519 Page - Renesas Technology Corp |
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H8S/2214 Scheda tecnica(HTML) 519 Page - Renesas Technology Corp |
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519 / 936 page ![]() Section 12 Serial Communication Interface (SCI) Rev.4.00 Sep. 18, 2008 Page 459 of 872 REJ09B0189-0400 12.2 Register Descriptions 12.2.1 Receive Shift Register (RSR) 7 — 6 — 5 — 4 — 3 — 0 — 2 — 1 — Bit R/W : : RSR is a register used to receive serial data. The SCI sets serial data input from the RxD pin in RSR in the order received, starting with the LSB (bit 0), and converts it to parallel data. When one byte of data has been received, it is transferred to RDR automatically. RSR cannot be directly read or written to by the CPU. 12.2.2 Receive Data Register (RDR) 7 0 R 6 0 R 5 0 R 4 0 R 3 0 R 0 0 R 2 0 R 1 0 R Bit Initial value R/W : : : RDR is a register that stores received serial data. When the SCI has received one byte of serial data, it transfers the received serial data from RSR to RDR where it is stored, and completes the receive operation. After this, RSR is receive-enabled. Since RSR and RDR function as a double buffer in this way, enables continuous receive operations to be performed. RDR is a read-only register, and cannot be written to by the CPU. RDR is initialized to H'00 by a reset, in standby mode, watch mode, subactive mode, and subsleep mode or module stop mode. |
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