H8SSLASH2214 datasheet(546/936 Pages) RENESAS

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Section 12 Serial Communication Interface (SCI)

Rev.4.00 Sep. 18, 2008 Page 486 of 872

REJ09B0189-0400

12.2.11

Module Stop Control Register B (MSTPCRB)

MSTPB7

R/W

MSTPB6

R/W

MSTPB5

R/W

MSTPB4

R/W

MSTPB3

R/W

MSTPB0

R/W

MSTPB2

R/W

MSTPB1

R/W

Bit

Initial value

R/W

MSTPCRB is an 8-bit readable/writable register that performs module stop mode control.

When one of bits MSTPB7 to MSTPB5 is set to 1, SCI0, SCI1, or SCI2 respectively, stops

operation at the end of the bus cycle, and enters module stop mode. For details, see section 17.5,

Module Stop Mode.

MSTPCRB is initialized to H'FF by a reset and in hardware standby mode. It is not initialized in

software standby mode.

Bit 7—Module Stop (MSTPB7): Specifies the SCI0 module stop mode.

Bit 7

MSTPB7

Description

SCI0 module stop mode is cleared

SCI0 module stop mode is set

(Initial value)

Bit 6—Module Stop (MSTPB6): Specifies the SCI1 module stop mode.

Bit 6

MSTPB6

Description

SCI1 module stop mode is cleared

SCI1 module stop mode is set

(Initial value)

Bit 5—Module Stop (MSTPB5): Specifies the SCI2 module stop mode.

Bit 5

MSTPB5

Description

SCI2 module stop mode is cleared

SCI2 module stop mode is set

(Initial value)

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