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H8S/2214 Scheda tecnica(PDF) 550 Page - Renesas Technology Corp

Il numero della parte H8S/2214
Spiegazioni elettronici  16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series
PDF  936 Pages
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Produttore elettronici  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8S/2214 Scheda tecnica(HTML) 550 Page - Renesas Technology Corp

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Section 12 Serial Communication Interface (SCI)
Rev.4.00 Sep. 18, 2008 Page 490 of 872
REJ09B0189-0400
12.3.2
Operation in Asynchronous Mode
In asynchronous mode, characters are sent or received, each preceded by a start bit indicating the
start of communication and stop bits indicating the end of communication. Serial communication
is thus carried out with synchronization established on a character-by-character basis.
Inside the SCI, the transmitter and receiver are independent units, enabling full-duplex
communication. Both the transmitter and the receiver also have a double-buffered structure, so
that data can be read or written during transmission or reception, enabling continuous data
transfer.
Figure 12.5 shows the general format for asynchronous serial communication.
In asynchronous serial communication, the transmission line is usually held in the mark state (high
level). The SCI monitors the transmission line, and when it goes to the space state (low level),
recognizes a start bit and starts serial communication.
One serial communication character consists of a start bit (low level), followed by data (in LSB-
first order), a parity bit (high or low level), and finally stop bits (high level).
In asynchronous mode, the SCI performs synchronization at the falling edge of the start bit in
reception. The SCI samples the data on the 8th pulse of a clock with a frequency of 16 times the
length of one bit, so that the transfer data is latched at the center of each bit.
When the ABCS bit in SEMR0 is set to 1, SCI0 samples the data on the 4th pulse of a clock with a
frequency of 8 times the length of one bit.
LSB
Start
bit
MSB
Idle state
(mark state)
Stop bit
0
Transmit/receive data
D0
D1
D2
D3
D4
D5
D6
D7
0/1
1
1
1
1
Serial
data
Parity
bit
1 bit
1 or
2 bits
7 or 8 bits
1 bit,
or none
One unit of transfer data (character or frame)
Figure 12.5 Data Format in Asynchronous Communication
(Example with 8-Bit Data, Parity, Two Stop Bits)



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