H8SSLASH2214 datasheet(719/936 Pages) RENESAS

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Section 18 Electrical Characteristics

Rev.4.00 Sep. 18, 2008 Page 659 of 872

REJ09B0189-0400

2. Programming time per 128 bytes (Indicates the total time during which the P1 bit is set

in flash memory control register 1 (FLMCR1). Does not include the program-verify

time).

3. Time to erase one block (Indicates the time during which the E1 bit is set in FLMCR1.

Does not include the erase-verify time).

4. Maximum programming time.

P (max.) = Wait time after P1 bit setting (tsp) × maximum number of writes (N)

= (t

sp30 + tsp10) × 6 + (tsp200) × 994

5. For the maximum erase time (t

E) (max.), the following relationship applies between the

wait time after E1 bit setting (t

se) and the maximum number of erase (N):

E (max.) = Wait time after E1 bit setting (tse) × maximum number of erases (N)

6. Minimum times that guarantee all characteristics after programming (The guaranteed

range is 1 to the minimum value).

7. Reference value when the temperature is 25°C (it is reference that reprogramming is

normally enabled up to this value).

8. Data hold characteristics when reprogramming is performed within the range of

specifications including the minimum value.

18.7

Usage Note

• Characteristics of the F-ZTAT and Mask ROM Versions

Although both the F-ZTAT and masked ROM versions fully meet the electrical specifications

listed in this manual, due to differences in the fabrication process, the on-chip ROM, and the

layout patterns, there will be differences in the actual values of the electrical characteristics,

the operating margins, the noise margins, and other aspects.

Therefore, if a system is evaluated using the F-ZTAT version, a similar evaluation should also

be performed using the masked ROM version.

• General Notes on Printed Circuit Board Deign

Circuit board designs for this IC must include adequate countermeasures to minimize radiated

noise due to the transient currents that occur during IC switching.

1. The circuit board must have both a power plane and a ground plane. A multilayer board

must be used. We present a concrete noise countermeasure example below.

2. Bypass capacitors (about 0.1 µF) must be inserted between the VCC and ground pins.

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