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H8S/2214 Scheda tecnica(PDF) 852 Page - Renesas Technology Corp |
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H8S/2214 Scheda tecnica(HTML) 852 Page - Renesas Technology Corp |
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852 / 936 page ![]() Appendix B Internal I/O Register Rev.4.00 Sep. 18, 2008 Page 792 of 872 REJ09B0189-0400 TMDR2—Timer Mode Register 2 H'FF31 TPU2 7 — 1 — 6 — 1 — 5 — 0 — 4 — 0 — 3 MD3 0 R/W 0 MD0 0 R/W 2 MD2 0 R/W 1 MD1 0 R/W Bit Initial value R/W : : : Mode 0 1 Note: MD3 is a reserved bit. In a write, it should always be written with 0. *: Don’t care 0 1 * 0 1 0 1 * 0 1 0 1 0 1 0 1 * Normal operation Reserved PWM mode 1 PWM mode 2 Phase counting mode 1 Phase counting mode 2 Phase counting mode 3 Phase counting mode 4 — |
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