H8SSLASH2214 datasheet(853/936 Pages) RENESAS

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Appendix B Internal I/O Register

Rev.4.00 Sep. 18, 2008 Page 793 of 872

REJ09B0189-0400

TIOR2—Timer I/O Control Register 2

H'FF32

TPU2

IOB3

R/W

IOB2

R/W

IOB1

R/W

IOB0

R/W

IOA3

R/W

IOA0

R/W

IOA2

R/W

IOA1

R/W

Bit

Initial value

R/W

I/O Control A3 to A0

0 output at compare match

1 output at compare match

Toggle output at compare match

0 output at compare match

1 output at compare match

Toggle output at compare match

Input capture at rising edge

Input capture at falling edge

Input capture at both edges

*: Don’t care

Output disabled

Initial output is 0

output

Output disabled

Initial output is 1

output

Capture input source

isTIOCA2 pin

TGR2A is

output

compare

TGR2A is

input capture

I/O Control B3 to B0

0 output at compare match

1 output at compare match

Toggle output at compare match

0 output at compare match

1 output at compare match

Toggle output at compare match

Input capture at rising edge

Input capture at falling edge

Input capture at both edges

*: Don’t care

Output disabled

Initial output is 0

output

Output disabled

Initial output is 1

output

Capture input source

isTIOCB2 pin

TGR2B is

output

compare

TGR2B is

input capture

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