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H8S/2214 Scheda tecnica(PDF) 244 Page - Renesas Technology Corp |
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H8S/2214 Scheda tecnica(HTML) 244 Page - Renesas Technology Corp |
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244 / 936 page ![]() Section 7 DMA Controller Rev.4.00 Sep. 18, 2008 Page 184 of 872 REJ09B0189-0400 Bit 4 DTDIR Description 0 Transfer with MAR as source address and IOAR as destination address (Initial value) 1 Transfer with IOAR as source address and MAR as destination address Bits 3 to 0—Data Transfer Factor (DTF3 to DTF0): These bits select the data transfer factor (activation source). There are some differences in activation sources for channel A and for channel B. Channel A Bit 3 Bit 2 Bit 1 Bit 0 DTF3 DTF2 DTF1 DTF0 Description 0 0 0 0 — (Initial value) 1 — 1 0 — 1 — 1 0 0 Activated by SCI channel 0 transmission complete interrupt 1 Activated by SCI channel 0 reception complete interrupt 1 0 Activated by SCI channel 1 transmission complete interrupt 1 Activated by SCI channel 1 reception complete interrupt 1 0 0 0 Activated by TPU channel 0 compare match/input capture A interrupt 1 Activated by TPU channel 1 compare match/input capture A interrupt 1 0 Activated by TPU channel 2 compare match/input capture A interrupt 1 — 1 0 0 — 1 — 1 0 — 1 — |
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