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H8S/2214 Scheda tecnica(PDF) 248 Page - Renesas Technology Corp |
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H8S/2214 Scheda tecnica(HTML) 248 Page - Renesas Technology Corp |
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248 / 936 page ![]() Section 7 DMA Controller Rev.4.00 Sep. 18, 2008 Page 188 of 872 REJ09B0189-0400 Bit 9—Data Transfer Acknowledge 0B (DTA0B): Enables or disables clearing, when DMA transfer is performed, of the internal interrupt source selected by the channel 0B data transfer factor setting. Bit 9 DTA0B Description 0 Clearing of selected internal interrupt source at time of DMA transfer is disabled (Initial value) 1 Clearing of selected internal interrupt source at time of DMA transfer is enabled Bit 8—Data Transfer Acknowledge 0A (DTA0A): Enables or disables clearing, when DMA transfer is performed, of the internal interrupt source selected by the channel 0A data transfer factor setting. Bit 8 DTA0A Description 0 Clearing of selected internal interrupt source at time of DMA transfer is disabled (Initial value) 1 Clearing of selected internal interrupt source at time of DMA transfer is enabled Bits 7 to 4—Data Transfer Enable (DTE): When DTE = 0, data transfer is disabled and the activation source selected by the data transfer factor setting is ignored. If the activation source is an internal interrupt, an interrupt request is issued to the CPU or DTC. If the DTIE bit is set to 1 when DTE = 0, the DMAC regards this as indicating the end of a transfer, and issues a transfer end interrupt request to the CPU or DTC. The conditions for the DTE bit being cleared to 0 are as follows: • When initialization is performed • When the specified number of transfers have been completed in a transfer mode other than repeat mode • When 0 is written to the DTE bit to forcibly abort the transfer, or for a similar reason When DTE = 1, data transfer is enabled and the DMAC waits for a request by the activation source selected by the data transfer factor setting. When a request is issued by the activation source, DMA transfer is executed. The condition for the DTE bit being set to 1 is as follows: • When 1 is written to the DTE bit after the DTE bit is read as 0 |
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