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H8S/2224 Scheda tecnica(PDF) 437 Page - Renesas Technology Corp

Il numero della parte H8S/2224
Spiegazioni elettronici  16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series
PDF  1071 Pages
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Produttore elettronici  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8S/2224 Scheda tecnica(HTML) 437 Page - Renesas Technology Corp

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Section 10 I/O Ports
Rev. 5.00 Aug 08, 2006 page 351 of 982
REJ09B0054-0500
10.11.2 Port F Data Register (PFDR)
PFDR stores output data for port F pins.
PFDR stores output data for port F pins.
Bit
Bit Name
Initial Value
R/W
Description
7PF7DR
0
R/W
6PF6DR
0
R/W
5PF5DR
0
R/W
4PF4DR
0
R/W
3PF3DR
0
R/W
2PF2DR
0
R/W
1PF1DR
0
R/W
0PF0DR
0
R/W
Output data for a pin is stored when the pin is
specified as a general purpose I/O port.
10.11.3 Port F Register (PORTF)
PORTF shows port F pin states. This register cannot be modified.
Bit
Bit Name
Initial Value
R/W
Description
7PF7
*
R
6PF6
*
R
5PF5
*
R
4PF4
*
R
3PF3
*
R
2PF2
*
R
1PF1
*
R
0PF0
*
R
If a port F read is performed while PFDDR bits are set
to 1, the PFDR values are read. If a port F read is
performed while PFDDR bits are cleared to 0, the pin
states are read.
Note:
* Determined by the states of pins PF7 to PF0.



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