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H8S/2224 Scheda tecnica(PDF) 442 Page - Renesas Technology Corp |
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H8S/2224 Scheda tecnica(HTML) 442 Page - Renesas Technology Corp |
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442 / 1071 page ![]() Section 10 I/O Ports Rev. 5.00 Aug 08, 2006 page 356 of 982 REJ09B0054-0500 • PG4/CS0 The pin functions are switched as shown below according to the combination of operating mode and the PG4DDR bit. Operating mode Modes 4 to 6 Mode 7 PG4DDR 0 1 0 1 Pin functions PG4 input pin CS0 output pin PG4 input pin PG4 output pin • PG3/Rx/CS1 The pin functions are switched as shown below according to the combination of the IEE bit in IECTR of IEB*, operating mode, and the PG3DDR bit. IEE* 01 Operating mode Modes 4 to 6 Mode 7 PG3DDR 01 01 Pin functions PG3 input pin CS1 output pin PG3 input pin PG3 output pin Rx input pin* Note: * Supported only by the H8S/2258 Group. • PG2/Tx/CS2 The pin functions are switched as shown below according to the combination of the IEE bit in IECTR of IEB*, operating mode, and the PG2DDR bit. IEE* 01 Operating mode Modes 4 to 6 Mode 7 PG2DDR 01 01 Pin functions PG2 input pin CS2 output pin PG2 input pin PG2 output pin Tx input pin* Note: * Supported only by the H8S/2258 Group. |
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