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H8S/2224 Scheda tecnica(PDF) 441 Page - Renesas Technology Corp |
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H8S/2224 Scheda tecnica(HTML) 441 Page - Renesas Technology Corp |
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441 / 1071 page ![]() Section 10 I/O Ports Rev. 5.00 Aug 08, 2006 page 355 of 982 REJ09B0054-0500 10.12.2 Port G Data Register (PGDR) PGDR stores output data for port G pins. Bit Bit Name Initial Value R/W Description 7 to 5 Undefined Reserved These bits are always read as undefined value. 4PG4DR 0 R/W 3PG3DR 0 R/W 2PG2DR 0 R/W 1PG1DR 0 R/W 0PG0DR 0 R/W Output data for a pin is stored when the pin is specified as a general purpose I/O port. 10.12.3 Port G Register (PORTG) PORTG shows port G pin states. This register cannot be modified. Bit Bit Name Initial Value R/W Description 7 to 5 Undefined Reserved These bits are always read as undefined value. 4PG4 * R 3PG3 * R 2PG2 * R 1PG1 * R 0PG0 * R If a port G read is performed while PGDDR bits are set to 1, the PGDR values are read. If a port G read is performed while PGDDR bits are cleared to 0, the pin states are read. Note: * Determined by the states of pins PG4 to PG0. 10.12.4 Pin Functions Port G pins also function as IEB* input/output pin, bus control signal input/output pin, and interrupt input pin. The values of registers and pin functions are shown below. Note: * Supported only by the H8S/2258 Group. |
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