H8SSLASH2224 datasheet(490/1071 Pages) RENESAS

490 / 1071 page

Section 11 16-Bit Timer Pulse Unit (TPU)

Rev. 5.00 Aug 08, 2006 page 404 of 982

REJ09B0054-0500

Synchronous operation

selection

Set TCNT

Synchronous presetting

[1]

[2]

Synchronous clearing

Select counter

clearing source

[3]

Start count

[5]

Set synchronous

counter clearing

[4]

Start count

[5]

Clearing

source generation

channel?

Yes

[1]

Set to 1 the SYNC bits in TSYR corresponding to the channels to be designated for synchronous operation.

[2]

When the TCNT counter of any of the channels designated for synchronous operation is written to, the same value is

simultaneously written to the other TCNT counters.

[3]

Use bits CCLR2 to CCLR0 in TCR to specify TCNT clearing by input capture/output compare, etc.

[4]

Use bits CCLR2 to CCLR0 in TCR to designate synchronous clearing for the counter clearing source.

[5]

Set to 1 the CST bits in TSTR for the relevant channels, to start the count operation.

Set synchronous

operation

Figure 11.11 Example of Synchronous Operation Setting Procedure

Example of Synchronous Operation: Figure 11.12 shows an example of synchronous operation.

In this example, synchronous operation and PWM mode 1 have been designated for channels 0 to

2, TGRB_0 compare match has been set as the channel 0 counter clearing source, and

synchronous clearing has been set for the channel 1 and 2 counter clearing source.

Three-phase PWM waveforms are output from pins TIOCA2, TIOCA1, and TIOCA0. At this

time, synchronous presetting, and synchronous clearing by TGRB_0 compare match, is performed

for channel 0 to 2 TCNT counters, and the data set in TGRB_0 is used as the PWM cycle.

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