H8SSLASH2224 datasheet(493/1071 Pages) RENESAS

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Section 11 16-Bit Timer Pulse Unit (TPU)

Rev. 5.00 Aug 08, 2006 page 407 of 982

REJ09B0054-0500

Example of Buffer Operation Setting Procedure: Figure 11.15 shows an example of the buffer

operation setting procedure.

Select TGR function

Buffer operation

Set buffer operation

Start count

[1]

[2]

[3]

[1]

Designate TGR as an input capture register or

output compare register by means of TIOR.

[2]

Designate TGR for buffer operation with bits

BFA and BFB in TMDR.

[3]

Set the CST bit in TSTR to 1 to start the count

operation.

Figure 11.15 Example of Buffer Operation Setting Procedure

Examples of Buffer Operation:

1. When TGR is an output compare register

Figure 11.16 shows an operation example in which PWM mode 1 has been designated for

channel 0, and buffer operation has been designated for TGRA and TGRC. The settings used

in this example are TCNT clearing by compare match B, 1 output at compare match A, and 0

output at compare match B.

As buffer operation has been set, when compare match A occurs the output changes and the

value in buffer register TGRC is simultaneously transferred to timer general register TGRA.

This operation is repeated each time compare match A occurs.

For details on PWM modes, see section 11.4.5, PWM Modes.

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