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H8S/2224 Scheda tecnica(PDF) 518 Page - Renesas Technology Corp

Il numero della parte H8S/2224
Spiegazioni elettronici  16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series
PDF  1071 Pages
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Produttore elettronici  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8S/2224 Scheda tecnica(HTML) 518 Page - Renesas Technology Corp

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Section 11 16-Bit Timer Pulse Unit (TPU)
Rev. 5.00 Aug 08, 2006 page 432 of 982
REJ09B0054-0500
Underflow
signal
TCNT
(underflow)
TCNT
input clock
H'0000
H'FFFF
TCFU flag
TCIU interrupt
φ
Figure 11.42 TCIU Interrupt Setting Timing
Status Flag Clearing Timing: After a status flag is read as 1 by the CPU, it is cleared by writing
0 to it. When the DTC or DMAC* is activated, the flag is cleared automatically. Figure 11.43
shows the timing for status flag clearing by the CPU, and figure 11.44 shows the timing for status
flag clearing by the DTC or DMAC*.
Note: * Supported only by the H8S/2239 Group.
Status flag
Write signal
Address
TSR address
Interrupt
request
signal
TSR write cycle
T1
T2
φ
Figure 11.43 Timing for Status Flag Clearing by CPU



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