H8SSLASH2224 datasheet(580/1071 Pages) RENESAS

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Section 14 IEBus™ Controller (IEB) [H8S/2258 Group]

Rev. 5.00 Aug 08, 2006 page 494 of 982

REJ09B0054-0500

Table 14.5 Control Field for Locked Slave Unit

Setting

Value

Bit 3

Bit 2

Bit 1

Bit 0

Function

H'0

Reads slave status

H'4

Reads locked address (upper 8 bits)

H'5

Reads locked address (lower 4 bits)

(1) Slave Status Read (Control Bits: H'0, H'6)

The master unit can decide the reason the slave unit does not return the acknowledgement (ACK)

by reading the slave status (H'0, H'6). The slave status indicates the result of the last

communications that the slave unit performs. All slave units can provide slave status information.

Figure 14.3 shows bit configuration of the slave status.

MSB

Bit 7

Notes: 1. Since this LSI can support up to mode 2, bits 6 and 7 are fixed to 10.

2. The value of bit 4 can be selected by the STE bit in the IEBus master unit address register 1 (IEAR1).

3. The slave receive buffer is a buffer which is accessed during data write

(control bits: H'8, H'A, H'B, H'E, H'F).

In this LSI, the slave receive buffer corresponds to the IEBus receive buffer register (IERBR);

and bit 2 is the value of the RxRDY flag in the IEBus receive status register (IERSR).

4. The slave transmit buffer is a buffer which is accessed during data read

(control bits: H'3, H'7).

In this LSI, the slave transmit buffer corresponds to the IEBus transmit buffer register (IETBR)

when SRQ = 1 in the IEBus general flag register (IEFLG); and bit 1 is a value which reverses the

TxRDY flag in the IEBus transmit/runaway status register (IETSR).

Bit 7,

bit 6

Bit 5

Bit 3

Bit 2

Bit 4*2

Bit 1*3

Bit 0*4

Mode 0

Indicates the highest mode

supported by a unit.*1

Mode 1

Mode 2

For future use

Fixed 0

Slave transmission halted

Slave transmission enabled

Slave receive buffer is empty

Slave receive buffer is not empty

Slave transmit buffer is empty

Slave transmit buffer is not empty

Unit is unlocked

Unit is locked

Bit

Value Description

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

LSB

Figure 14.3 Bit Configuration of Slave Status (SSR)

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